external refclock

[Hotscam]

My Pluto has a large clock offset at higher bands (up to 35 kHz) so I try to connect a GPSDO with 40 MHz output; level adjustable between 2 and 3 V p-p

Via putty I set the clock external and when I read back the clock is external, but the external input is not active.

I checked with an external test signal but the offset is not corrected

Any hints ?

Jack
PA3AXO

[g0mjw]

Have you modified the hardware to enable the external clock? It depends which board revision you have. There are also differences between firmware editions.

[Basil]

I am using a Rev D Pluto, but this command works for earlier ones too, I believe.

Command it to:

fw_printenv

and post the result. Towards the end of the text file you should see that th Pluto is using an external reference and what the frequency of that reference is, for example, from mine:

attr_name=compatible
attr_val=ad9364
ad936x_refclk_override=40000000
usb_ethernet_mode=0
compatible=ad9364
fit_size=1AB13A3
ad936x_ext_refclk_override=40000000
ad936x_ext_refclk=40000000
refclk_source=external
hostname=pluto
ipaddr=192.168.2.1
ipaddr_host=192.168.2.10
netmask=255.255.255.0
xo_correction=40000000
udc_handle_suspend=0
ipaddr_eth=192.168.178.20
netmask_eth=255.255.255.0
gateway_eth=192.168.178.1



Chris 2E0ILY

[K0SM]

I use a Leo Bodner GPSDO at 40 MHz for my microwave station on 900-5760 and 47G (5.9GHz IF), and yes, you'll appreciate a stable reference compared to what comes with the ADALM Pluto for anything on the microwave bands. A good reference for relevant uboot variables is here: https://wiki.analog.com/university/tool ... vs/booting

You need to tell the AD936x to use the external clock input instead of the internal if you are attaching to the little IPX clock input connector on the board:

Code: Select all

fw_setenv refclk_source external

Also, you'll need that reference on when you start the Pluto. If I apply power at the same time to everything that seems to be fine, as it takes the Pluto a few seconds to boot.

My experience (and others) is that any source below 20 MHz is kinda marginal. If you have a 40 MHz source it makes things easy. You'll need to change the external clock reference frequency per the above if you use something else.

Andy K0SM/2

[K0SM]

Also, in troubleshooting, you can verify that that you are using the external reference by turning off or disconnecting the external source while Langstone is running. Langstone should hang when that happens and you can be sure you really are on your external oscillator and not the internal one.

Andy K0SM/2

[Hotscam]

I have a Pluto C/D version running OEO firmware 0.31-dirty as required for langstone

I used a UFL to SMA little cable to connect to my GPSDO running 40 MHz at 1.5 Volt p-p level

via Putty :
fw_setenv refclk_source external
fw_setenv ad936x_ext_refclk_override "<40000000>"
pluto_reboot reset

When I read back
fw_printenv refclk_source
it says refclk external

I use a 1 GHz GPSDO based ref signal to be received on the Langstone and notice a 30 kHz offset error
I connect the 40 MHz to the Pluto ref input and see no difference in offset. It seems to remain on internal clk
It also does not hang when I remove the 40 MHz as you would expect

I dont get a nice list but the parameters look the same

# fw_printenv
ad936x_ext_refclk=<40000054>
ad936x_ext_refclk_override=40000000
adi_loadvals=fdt addr ${fit_load_address} && fdt get value fdt_choosen /configurations/${fit_config}/ fdt && fdt get addr fdtaddr /images/${fdt_choosen} data && fdt addr ${fdtaddr}; if test -n ${ad936x_ext_refclk} && test ! -n ${ad936x_skip_ext_refclk}; then fdt set /clocks/clock@0 clock-frequency ${ad936x_ext_refclk}; fi; fdt get value model / model; if test -n ${ad936x_ext_refclk_override} && test "${model}" = "Analog Devices PlutoSDR Rev.C (Z7010/AD9363)"; then fdt set /clocks/clock@0 clock-frequency ${ad936x_ext_refclk_override}; fi; if test ${refclk_source} = internal || test ! "${model}" = "Analog Devices PlutoSDR Rev.C (Z7010/AD9363)" ; then fdt rm /amba/gpio@e000a000/clock_extern_en; fi; if test -n ${attr_name} && test -n ${attr_val}; then fdt set /amba/spi@e0006000/ad9361-phy@0 ${attr_name} ${attr_val}; fi; if test ${refclk_source} = external || test ! "${model}" = "Analog Devices PlutoSDR Rev.C (Z7010/AD9363)" ; then fdt rm /amba/gpio@e000a000/clock_internal_en; fi; if test -n ${compatible} && test ! ${compatible} = ad9361 && test ! ${compatible} = ad9363a && test ! ${compatible} = ad9364; then setenv compatible ad9363a; saveenv; fi; if test -n ${mode} && test ! ${mode} = 1r1t && test ! ${mode} = 2r2t; then setenv mode 1r1t; saveenv; fi; if test -n ${refclk_source} && test ! ${refclk_source} = internal && test ! ${refclk_source} = external; then setenv refclk_source internal; saveenv; fi; if test -n ${compatible}; then fdt set /amba/spi@e0006000/ad9361-phy@0 compatible ${compatible}; fi; if test ${compatible} = ad9361 && test ! "${model}" = "Analog Devices PlutoSDR Rev.C (Z7010/AD9363)" ; then fdt set /amba/spi@e0006000/ad9361-phy@0 compatible ad9363a; compatible=ad9363a; fi; if test ${mode} = 1r1t || test ! "${model}" = "Analog Devices PlutoSDR Rev.C (Z7010/AD9363)"; then fdt rm /amba/spi@e0006000/ad9361-phy@0 adi,2rx-2tx-mode-enable; fi; if test -n ${cs_gpio}; then fdt set /amba/axi_quad_spi@7C430000/ cs-gpios "<0x06 ${cs_gpio} 0>"; fi; if test ${compatible} = ad9364 || test -n ${attr_val} = ad9364; then fdt rm /amba/spi@e0006000/ad9361-phy@0 adi,2rx-2tx-mode-enable; fdt set /fpga-axi/cf-ad9361-dds-core-lpc@79024000 compatible adi,axi-ad9364-dds-6.00.a; setenv mode 1r1t; saveenv; fi;
attr_name=compatible
attr_val=ad9364
baudrate=115200
bitstream_image=system.bit.bin
bitstream_size=0x400000
boot_image=BOOT.bin
boot_size=0xF00000
bootcmd=run $modeboot
bootdelay=0
bootenv=uEnv.txt
clear_reset_cause=mw f8000008 df0d && mw f8000258 00400000 && mw f8000004 767b
compatible=ad9364
devicetree_image=devicetree.dtb
devicetree_load_address=0x2000000
devicetree_size=0x20000
dfu_ram=echo Entering DFU RAM mode ... && run dfu_ram_info && dfu 0 ram 0
dfu_ram_info=set dfu_alt_info dummy.dfu ram 0 0\\;firmware.dfu ram ${fit_load_address} 0x1E00000
dfu_sf=gpio set 15;set stdout serial@e0001000;echo Entering DFU SF mode ... && run dfu_sf_info && dfu 0 sf 0:0:40000000:0 && if test -n ${dfu_alt_num} && test ${dfu_alt_num} = 1; then set fit_size ${filesize} && set dfu_alt_num && env save; fi;gpio clear 15;
dfu_sf_info=set dfu_alt_info boot.dfu raw 0x0 0x100000\\;firmware.dfu raw 0x200000 0x1E00000\\;uboot-extra-env.dfu raw 0xFF000 0x1000\\;uboot-env.dfu raw 0x100000 0x20000\\;spare.dfu raw 0x120000 0xE0000
ethaddr=00:0a:35:00:01:22
extraenv_load_address=0x207E000
fdt_choosen=fdt@3
fdt_high=0x20000000
fdtaddr=2088484
fdtcontroladdr=1ff99320
fit_config=config@8
fit_load_address=0x2080000
fit_size=1AB13A3
importbootenv=echo Importing environment from SD ...; env import -t ${loadbootenv_addr} $filesize
initrd_high=0x20000000
ipaddr=192.168.2.1
ipaddr_host=192.168.2.10
jtagboot=env default -a;sf probe && sf protect unlock 0 100000 && run dfu_sf;
kernel_image=uImage
loadbit_addr=0x100000
loadbootenv=load mmc 0 ${loadbootenv_addr} ${bootenv}
loadbootenv_addr=0x2000000
mode=1r1t
modeboot=qspiboot
model=Analog Devices PlutoSDR Rev.B (Z7010/AD9363)
netmask=255.255.255.0
preboot=if test $modeboot = sdboot && env run sd_uEnvtxt_existence_test; then if env run loadbootenv; then env run importbootenv; fi; fi;
productkey=eb126ad1d4a91aa07d12d318d19a289a525eaf70
qspiboot=set stdout nulldev;adi_hwref;test -n $PlutoRevA || gpio input 14 && set stdout serial@e0001000 && sf probe && sf protect lock 0 100000 && run dfu_sf; set stdout serial@e0001000;itest *f8000258 == 480003 && run clear_reset_cause && run dfu_sf; itest *f8000258 == 480007 && run clear_reset_cause && run ramboot_verbose; itest *f8000258 == 480006 && run clear_reset_cause && run qspiboot_verbose; itest *f8000258 == 480002 && run clear_reset_cause && exit; echo Booting silently && set stdout nulldev; run read_sf && run adi_loadvals; envversion;setenv bootargs console=ttyPS0,115200 maxcpus=${maxcpus} rootfstype=ramfs root=/dev/ram0 rw quiet loglevel=4 uboot="${uboot-version}" && bootm ${fit_load_address}#${fit_config} || set stdout serial@e0001000;echo BOOT failed entering DFU mode ... && sf protect lock 0 100000 && run dfu_sf
qspiboot_extraenv=sf read ${extraenv_load_address} 0xFF000 0x1000 && env import -c ${extraenv_load_address} 0x1000 || true
qspiboot_verbose=adi_hwref;echo Copying Linux from QSPI flash to RAM... && run read_sf && if run adi_loadvals; then echo Loaded AD936x refclk frequency and model into devicetree; fi; envversion;setenv bootargs console=ttyPS0,115200 maxcpus=${maxcpus} rootfstype=ramfs root=/dev/ram0 rw earlyprintk uboot="${uboot-version}" && bootm ${fit_load_address}#${fit_config} || echo BOOT failed entering DFU mode ... && run dfu_sf
ramboot_verbose=adi_hwref;echo Copying Linux from DFU to RAM... && run dfu_ram;if run adi_loadvals; then echo Loaded AD936x refclk frequency and model into devicetree; fi; envversion;setenv bootargs console=ttyPS0,115200 maxcpus=${maxcpus} rootfstype=ramfs root=/dev/ram0 rw earlyprintk uboot="${uboot-version}" && bootm ${fit_load_address}#${fit_config}
ramdisk_image=uramdisk.image.gz
ramdisk_load_address=0x4000000
ramdisk_size=0x400000
read_sf=sf probe 0:0 50000000 0 && run qspiboot_extraenv &&sf read ${fit_load_address} 0x200000 ${fit_size} && iminfo ${fit_load_address} || sf read ${fit_load_address} 0x200000 0x1E00000;
refclk_source=external
sd_uEnvtxt_existence_test=test -e mmc 0 /uEnv.txt
serial=1044739a470b0002fdff220027b37f229e
stderr=serial@e0001000
stdin=serial@e0001000
stdout=nulldev
thor_ram=run dfu_ram_info && thordown 0 ram 0
uenvboot=if run loadbootenv; then echo Loaded environment from ${bootenv}; run importbootenv; fi; if test -n $uenvcmd; then echo Running uenvcmd ...; run uenvcmd; fi
usbboot=if usb start; then run uenvboot; echo Copying Linux from USB to RAM... && load usb 0 ${fit_load_address} ${kernel_image} && load usb 0 ${devicetree_load_address} ${devicetree_image} && load usb 0 ${ramdisk_load_address} ${ramdisk_image} && bootm ${fit_load_address} ${ramdisk_load_address} ${devicetree_load_address}; fi
#

73s
Jack PA3AXO

[g0mjw]

Have you modified it at all? It seems perhaps the internal reference is not disabled. GPIO6 is used for that, with Q2 switching the internal reference enable line. Do some hardware testing perhaps with a scope?

[Basil]

As Andy mentioned, are you sure the external clock is running *BEFORE* you start the Pluto?? I have a little timer on my set up to get the Bodnar up to speed before power is applied to the Pluto.

[Hotscam]

The Pluto is fully standard non modified.
just the UFL cable is plugged into the CLK_IN connector on the board
The firmware of F5OEO 0,31-dirty was installed as required for the portsdown
The GPSDO is fully up and running connected to the Pluto before I power the Pluto
I will check Q2 an Q3 later later when somebody confirms the parameter settings are correct

rgds

Jack PA3AXO

[g0mjw]

"The firmware of F5OEO 0,31-dirty was installed as required for the portsdown"

But that is for Model B and you have a Model C/D. Does it understand the external reference switching? Perhaps there is a patch needed? I can't help as I don't have one.

Mike

https://www.zr6tg.co.za/2022/06/28/adal ... -for-datv/