BATC Forum

Greetings,

Does anyone have a suggestion as to a good description
of the composite and component waveforms for SD and
HD formats?

I have found some notes on the Internet but they all seem
to be missing bits or are in gawdy colours that are difficult
to read. I appear to have lost my BBC B course notes which
I think had a good description of the PAL waveform.

I am trying to implement a SD / HD test card generator on
an Altera FPGA development board. So I need quite detailed
information.

- Charles G4GUO

Does this help?

http://www.maxim-ic.com/app-notes/index.mvp/id/734

Thanks, good try but it does not go into nearly enough detail.

The best I can find is.
http://www.pembers.freeserve.co.uk/Worl ... dards.html

It is suprising how little use much of the material on the internet is. I am sure
what I am looking for is out there somewhere.

It is the frame syncs I am having a problem with currently. My code generates
them but it is very complicated using state machines and I am sure there is a
simpler way to construct them.

- Charles

It seems if I need ITU-R recommendation BT.1700 unfortunately the
3 free downloads from the ITU bookshop is broken at the moment.
Oh well.

- Charles G4GUO

Seems as if the ITU bookshop does not like Firefox.
I changed to IE and have been able to download BT.1700
I now have 2 downloads left.

Hi Charles,

This is the 625 system B frame sync structure:

http://www.pembers.freeserve.co.uk/Worl ... 25-PAL.pdf

All the other analogue systems are there too.

Hi,

In the end I downloaded a copy of BT.1700 and have the
sync FPGA code done, I am just trying to figure out the
colour burst phase and blanking at the moment.

The field numbering is a bit confusing as they have
Field 1, Field 2 in one figure then field I, II, III, IV
in another and in one of the sets of notes they talk about
field 1,2,3,4,5,6,7,8

I think they mean
field
1 I 1
2 II 2
1 III 3
2 IV 4
1 I 5
2 II 6
1 III 7
2 IV 8

Well I hope they do!

- Charles

If I remember correctly from when I used to teach this stuff at Wood Norton nearly 40 years ago, field 1 of the 8-field sequence is where the sub-carrier zero crossing is positive going at the leading edge of line 1 sync.

I may be wrong!

Well I finally managed to get enough information to get the FPGA code to work.
Just need to design a fancy looking test card next. There is only about 120 kbits
of memory in the small FPGA so it will have to be something simple. Still it has
proved a good learning exercise and makes me feel confident in tackling a more
complex project next.

I guess most people use a P.C these days for their testcards/video effects.

- Charles