Does anyone have any clues on forcing LCD monitors to display when they don't have a P5 signal present at the input?
The monitors I have will only display when there has been a strong valid signal present for some seconds.
I had thought that some form of free running sync injector could be used, to false the monitors into thinking that there is a PAL signal.
I have seen plenty of designs for sync conditioning seperate and and re-inject the sync, but non that will 'free-wheel' without a sync being present.
I don't think there is a need for a colourburst, as my monitors will come up on a B&W signal.
I'm sure I can't be the only one who has this problem.
Jules
A method of forcing LDC monitors to display?
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Re: A method of forcing LDC monitors to display?
Thanks for the link.
That is an interesting design, but not quite what I was looking for in itself.
I am wondering if it would be possible to use your SPG along with a sync processor, so that the SPG output would be inserted when there was no valid received sync. so the monitor would display the received picture, with a rolling 'lock'. But switch to the real received sync when it was strong enough.
Looks like there are some experiments to do when I get some time.
Jules
That is an interesting design, but not quite what I was looking for in itself.
I am wondering if it would be possible to use your SPG along with a sync processor, so that the SPG output would be inserted when there was no valid received sync. so the monitor would display the received picture, with a rolling 'lock'. But switch to the real received sync when it was strong enough.
Looks like there are some experiments to do when I get some time.
Jules
Re: A method of forcing LDC monitors to display?
Sometimes it helps if you pass the video through another device like a vcr as they sometimes have some correction in them..
You always get a far better picture on a crt monitor compared with LCD for an anlogue signal so it's probably best just to use an old analogue TV with scart input in the end!
Checked the AV input on my Vistron PC Monitor/TV and it needs about a p2 signal to break through the black screen, couldnt find a way to disable it either..
73
Rob
M0DTS
You always get a far better picture on a crt monitor compared with LCD for an anlogue signal so it's probably best just to use an old analogue TV with scart input in the end!
Checked the AV input on my Vistron PC Monitor/TV and it needs about a p2 signal to break through the black screen, couldnt find a way to disable it either..
73
Rob
M0DTS
Re: A method of forcing LDC monitors to display?
Rob,
Looks like this is a common problem then. Of the googling I've doen, it also looks like the model aircraft boys have the same issues, when they try and strap a camera on their planes.
The last few VCR's I had also had their own blue screen lockout. But in any case would be far too big for portable ATV (Which is where I would be wanting to use an LCD monitor most.)
I did see a posting to one group on using a ZNA234 chip. The datasheet for these suggests that there is a frame reset pin, so it may be possible to use one, with a sync seperator/conditioner to lock it up to the incoming sync when it appears. Though it looks like these are a little long in the tooth and may be difficult to source.
Also, gw6bwx, if your name is Steve, then I may have seen one of your postings to an RC forum, suggesting it may be possible to mod your 50 pence SPG to support a sync lock/reset facility. That could then replace the ZNA234.
I will have a little play with my pulse generator and see if I can find what part of the sync my monitors are looking for. Some posts have suggested that they only look for the frame pulse. If that is so, it may simplify things.
Jules
Looks like this is a common problem then. Of the googling I've doen, it also looks like the model aircraft boys have the same issues, when they try and strap a camera on their planes.
The last few VCR's I had also had their own blue screen lockout. But in any case would be far too big for portable ATV (Which is where I would be wanting to use an LCD monitor most.)
I did see a posting to one group on using a ZNA234 chip. The datasheet for these suggests that there is a frame reset pin, so it may be possible to use one, with a sync seperator/conditioner to lock it up to the incoming sync when it appears. Though it looks like these are a little long in the tooth and may be difficult to source.
Also, gw6bwx, if your name is Steve, then I may have seen one of your postings to an RC forum, suggesting it may be possible to mod your 50 pence SPG to support a sync lock/reset facility. That could then replace the ZNA234.
I will have a little play with my pulse generator and see if I can find what part of the sync my monitors are looking for. Some posts have suggested that they only look for the frame pulse. If that is so, it may simplify things.
Jules
Re: A method of forcing LDC monitors to display?
I've been called many things but never "Steve", the name is Brian.
For a long time I've been thinking of something to do exactly what you want but for an entirely different reason. Back in the year dot I remember using BSB D2MAC satellite receivers to view weak analogue FM satellite signals. Very often, a signal too weak to see through the noise and un-syncable, would be perfectly readable in D2MAC mode but of course in monochrome and squashed horizontally due to the sampling rates being wrong. The reason they became readable was that the sync was being provided from a crystal controlled timebase instead of from an almost random conventional sync separator. It occurred to me that an adjustable, free-running sync generator could be used to view weak DX TV signals that would otherwise be impossible to recognize. I figured it could have say +/- 5Hz vertical sync adjustment and +/- 100Hz horizontal adjustment but still have a weak lock to the incoming signal. Under very low signal conditions, it would genuinely free run but the adjustments would allow for manual stabilization and as the signal got stronger, it would lock to the real syncs.
Sounds like it would work for your application too. I never got round to building it but there's time yet...
The 50p SPG should work if you sync it by switching the power on and off in time with the vertical sync pulses but the phase may be tricky to get right. When the power is applied, the chip starts counting its own clock pulses before releasing its internal reset line and letting the program run. The delay is there to give time for the internal hardware to initialize and is consistent each power-up. I might be able to make a "more than 50p SPG" version with genlock if there is demand.
Brian (not Steve)
For a long time I've been thinking of something to do exactly what you want but for an entirely different reason. Back in the year dot I remember using BSB D2MAC satellite receivers to view weak analogue FM satellite signals. Very often, a signal too weak to see through the noise and un-syncable, would be perfectly readable in D2MAC mode but of course in monochrome and squashed horizontally due to the sampling rates being wrong. The reason they became readable was that the sync was being provided from a crystal controlled timebase instead of from an almost random conventional sync separator. It occurred to me that an adjustable, free-running sync generator could be used to view weak DX TV signals that would otherwise be impossible to recognize. I figured it could have say +/- 5Hz vertical sync adjustment and +/- 100Hz horizontal adjustment but still have a weak lock to the incoming signal. Under very low signal conditions, it would genuinely free run but the adjustments would allow for manual stabilization and as the signal got stronger, it would lock to the real syncs.
Sounds like it would work for your application too. I never got round to building it but there's time yet...
The 50p SPG should work if you sync it by switching the power on and off in time with the vertical sync pulses but the phase may be tricky to get right. When the power is applied, the chip starts counting its own clock pulses before releasing its internal reset line and letting the program run. The delay is there to give time for the internal hardware to initialize and is consistent each power-up. I might be able to make a "more than 50p SPG" version with genlock if there is demand.
Brian (not Steve)
Re: A method of forcing LDC monitors to display?
Brian (that is called Brian)
I would have thought that the convenience of LCD monitors would have meant that this problem would have been solved already? But I have been wrong before.
From what I understand from the PAL spec (as far as there is one) the frame sync is only detected part way through the line, depending on the sync seperator. So I can see the difficulty of getting a sync lock, if using the frame sync to also set the timing of the line sync.
For my application of just keeping the monitor running, whilst trying to tune a signal, then the actual sync lock is not to important. But if you want to inprover the weak signal performance (as you have described) then I can see it taking a little more thought. (I need to do some more reading on the waveform I think).
I'm sure there would be a reasonable amount of interest, given that LCD monitors are here to stay. A 75p genlock project?
Jules
I would have thought that the convenience of LCD monitors would have meant that this problem would have been solved already? But I have been wrong before.
From what I understand from the PAL spec (as far as there is one) the frame sync is only detected part way through the line, depending on the sync seperator. So I can see the difficulty of getting a sync lock, if using the frame sync to also set the timing of the line sync.
For my application of just keeping the monitor running, whilst trying to tune a signal, then the actual sync lock is not to important. But if you want to inprover the weak signal performance (as you have described) then I can see it taking a little more thought. (I need to do some more reading on the waveform I think).
I'm sure there would be a reasonable amount of interest, given that LCD monitors are here to stay. A 75p genlock project?
Jules
Re: A method of forcing LDC monitors to display?
The PAL spec is actually very precise and well documented although getting hold of it can be a problem.
Sync separators work on the principle of measuring the pulse length rather than its position relative to other syncs or video. Normally, the slicing voltage is chosen so it removes all the video information and the resulting composite sync is timed from edge to edge. If it's narrow and within the bounds of horizontal tolerance, it is deemed to be a horizontal sync pulse and if it is wider and within vertical sync limits it is regarded as a vertical sync pulse. I don't know of any systems that check how many horizontal syncs fall between vertical ones to decide if a picture is present, only the presence of one or both is used.
I'll look at the "75p SPG" project although I suspect it may cost a little more than that. For one thing, it needs more pins than the present design has available and I suspect it will have to use PWM or at least several internal timers to be able to produce consistent syncs while looking for a signal to lock to as well. The present design uses software loops to time the syncs but that method fails when the program has to start making decisions based on input signals and unpredictable program flow results.
The real Brian.
Sync separators work on the principle of measuring the pulse length rather than its position relative to other syncs or video. Normally, the slicing voltage is chosen so it removes all the video information and the resulting composite sync is timed from edge to edge. If it's narrow and within the bounds of horizontal tolerance, it is deemed to be a horizontal sync pulse and if it is wider and within vertical sync limits it is regarded as a vertical sync pulse. I don't know of any systems that check how many horizontal syncs fall between vertical ones to decide if a picture is present, only the presence of one or both is used.
I'll look at the "75p SPG" project although I suspect it may cost a little more than that. For one thing, it needs more pins than the present design has available and I suspect it will have to use PWM or at least several internal timers to be able to produce consistent syncs while looking for a signal to lock to as well. The present design uses software loops to time the syncs but that method fails when the program has to start making decisions based on input signals and unpredictable program flow results.
The real Brian.
Re: A method of forcing LDC monitors to display?
Brian,
That was roughly as I had understood the system to work, from my admittedly brief research.
Also, I had done a few calculations and came to the conclusion that the only way that it was possible to produce a sync train, was exactly as you described, with tight loops of assembly code. Given a PIC clocked at 4MHz.
I did wonder if it would be possible to use one of the standard hardware sync seperator chips (more than 25p worth!), then use very simple conditionals to trip the frame loops (to exit earlier, or to hold off) to get a lock from a real source. This would take the effort of detecting the sync of the incoming signal into hardware and keep the programing simple.
This would give a free running SPG, but with locked vertical sync. I could see that this could lead to a skewing of the picture if the frame/line rate of the incoming source was vastly different to the SPG (in the same way that I assume would happen with the locally generated sync for dxtv?). But is there much of a difference in off air amateur signals these days? Anyway, the op could always switch to the real sync, when the signal was strong enough.
Apologies, if the above is wide of the mark. I still have a lot of reading to do, and not much time to do it in!
Jules
That was roughly as I had understood the system to work, from my admittedly brief research.
Also, I had done a few calculations and came to the conclusion that the only way that it was possible to produce a sync train, was exactly as you described, with tight loops of assembly code. Given a PIC clocked at 4MHz.
I did wonder if it would be possible to use one of the standard hardware sync seperator chips (more than 25p worth!), then use very simple conditionals to trip the frame loops (to exit earlier, or to hold off) to get a lock from a real source. This would take the effort of detecting the sync of the incoming signal into hardware and keep the programing simple.
This would give a free running SPG, but with locked vertical sync. I could see that this could lead to a skewing of the picture if the frame/line rate of the incoming source was vastly different to the SPG (in the same way that I assume would happen with the locally generated sync for dxtv?). But is there much of a difference in off air amateur signals these days? Anyway, the op could always switch to the real sync, when the signal was strong enough.
Apologies, if the above is wide of the mark. I still have a lot of reading to do, and not much time to do it in!
Jules